PhD in Gate Drivers for Multi-Level Topologies employing Si, GaN or SiC Switches
Summary of the Project
Huge growth in power electronics’ market areas such as automotive EV and renewable energy integration is driving the imperative for higher power densities, higher voltages and higher switching frequencies. Battery cell stacks and DC-Link voltages in automotive are trending towards 800 V and to greater than 1500 V for PV string inverters. Concurrently, there are significant developments in power switch technologies across silicon DMOS, gallium nitride (GaN HEMT) and silicon carbide (SiC). This project is focused on the power switch gate drivers for the distributed power electronic switching cells – laterally by power level (consider traction drive per wheel or grid-tie inverter per PV unit array) and vertically by switching cell voltage level, considering stacked switches or multi-level converters. These gate drivers will be highly integrated with their switches and have new features to maximise switch performance and protection.
The ideal candidate will have the opportunity to perform cutting-edge research on the development of gate driver solutions for multi-level topologies, which naturally reduce the size, cost and weight of the passive components in power systems by more than 4X. The research will focus on the design and integration of a number of innovative intelligent gate driver features to enhance, switching speed, efficiency, EMI and overall performance. The candidate will explore new techniques for achieving magnetic galvanic isolation between the switch driver signal and secondary side switch or bridge driver with the smallest possible magnetic transformer size. An efficient and integrated powering system for the gate driver output stage will be an important aspect. The developments will consider the addition of new switch control and protection telemetry features for switch stacks in multi-level architectures, employing Silicon, GaN or SiC switches.
Whereas the project is primarily about the gate driver IC design, the research will necessarily involve deep investigations into a number of related disciplines such as advanced packaging technologies for the heterogeneous integration between the CMOS gate driver circuit and its switch. Minitiaturisation of the gate driver transformer by substrate-embedding or the use of metallic thin film materials will be investigated. A resonant bias converter may be used for the power transfer and resonant gate driver energy recovery techniques may be researched.
The candidate will have access to world-class research facilities and opportunity to collaborate with other Tyndall research teams, such as its magnetics-on-silicon group. MCCI also has many on-going internal formal and informal training opportunities in various aspects of CMOS design, across power, high-speed/ precision analog and RF.
- Carry out innovative research in gate driver IC development for Si or GaN based multi-level, power switching converters
- Perform theoretical and experimental analyses of silicon and GaN switch based power converters to determine ideal gate driver requirements
- Perform electrical modelling and characterisations of various integrated electronics packaging systems, such as power-systems in-package (PwrSiP) employing embedded substrate technology
- Perform electrical modelling, analysis and test of high frequency transformers based on novel magnetic materials
- Design, layout, validate and tape-out innovative gate driver IC circuits on a CMOS technology such as 180 nm SOI
- Characterise IC samples and experimentally evaluate in AC power electronic systems
- Participate in related research projects under the direction of supervisors
- Work on collaborative research projects with industrial or other academic partners
- Engage in the dissemination of the results of the research, as directed by and with the support of supervisors – such as by tier-1 journal publications and presenting at top international conferences
- Participate in Education and Public Engagement activities, as required
- Ensure all activities are compliant with the MCCI Processes and Tyndall Quality Management systems and required Health & Safety standards.
- Carry out any additional duties as may reasonably be required within the general scope and level of the PhD
- Participate in design reviews with other researchers in the MCCI group
- The ideal applicants will have a 1st Class Honours degree or an MSc in Physics, Electronic Engineering or a related discipline
- Evidence of a desire to innovate
- Strong background knowledge in the CMOS design or power electronics area will be advantageous, but not essential
Informal enquiries may be made, in-confidence, to firstname.lastname@example.org
An annual student stipend of €18,500 applies for the successful candidate for this position. Yearly University Academic Fees will be paid by MCCI.
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