Senior Researcher in Mixed-Signal Energy-Harvesting PMIC

  • Cork

SOD-10 Senior Researcher in Mixed-Signal Energy-Harvesting PMIC

Contract: Full Time/Fixed Term

The Research Area

Our focus is on researching techniques to bring advanced mixed-signal control features to the sub-µW, energy-harvesting, smart sensing node’s power management IC (PMIC) space. Research PMICS derived from the Tyndall multiple-source, energy-harvesting PMIC platform will enable many of the edge nodes in tomorrow’s internet-of-things, IoT, to become battery-less by efficiently harvesting available ambient energies and supporting a reduction in the system’s energy consumption. Body-wearable and implantable medical devices are target application areas. This platform will also be at the heart of highly integrated energy-source in-package (eSiP) systems designed to showcase technologies being created across Tyndall’s co-located research groups, in areas such as thin-film magnetic-on-silicon, III-V UV PV devices, solid-state electrochemical storage cells/sensors and MEMS scale energy harvesting transducers spanning thermoelectric (TEG), PV or piezo/ electromagnetic vibrational.

About The Role

The role will ideally suit the established PMIC Researcher or industry based Senior/Principal CMOS Designer who desires a career path transitioning into research leadership in the Ultra-Low Power Energy Harvesting PMIC area.

You will be the central CMOS design person on the group’s existing mixed-signal, flexible, ultra-low-power platform, so that it will support the creation of derivative research PMICs across the entire ultra-low power energy harvesting application space from low voltage DC TEG based to low voltage AC vibrational.

You will report to the Principal Investigator, will act as both an independent design contributor and will support with co-ordinating a small team of post-graduate research staff and PhD students

Key Responsibilities

  • Provide research stewardship support within MCCI’s ULP PMIC research theme to deliver excellent research that will deliver innovative and commercialisable technologies, intellectual property and key publications in pre-eminent journals and international conferences.
  • Author, mentor and co-author peer-reviewed publications of international standing.
  • Building research partnerships and creating research proposals, which will attract funding from both Industry and public research bodies in both Ireland and the European Union.
  • As an individual contributor, complete mixed-signal CMOS ULP PMIC circuit designs from concept through tape-out and silicon characterisation.
  • Model, design and simulate mixed-signal control systems to maximise energy transduction from a range of µW-level ambient energy harvester types including PV, TEG, and Piezo Vibrational, into both energy storage devices (supercapacitors and rechargeable cells) and to well-regulated system voltages.
  • Design, Synthesise and Validate ULP digital control blocks for CMOS to implement voltage, current, power and energy control loops for the above harvester types.
  • Create and validate analog layouts, as well as place & route and timing closure for digital circuits.
  • Perform experimental characterisations of stand-alone prototype ICs and in power converter systems.
  • Manage/participate in education and public outreach engagement activities, as required.
  • Ensure all activities are compliant with MCCI Processes and the Tyndall Quality Management System.
  • To initiate, enforce and comply with UCC and Tyndall’s health and safety and quality policies.
  • Carry out any additional duties as may reasonably be required within the general scope and level of the post.

Essential Criteria

  • PhD in Power Management IC (PMIC), Gate Driver, RF, Precision Mixed-Signal IC or related area.
  • Significant experience in Individual Technical Expert contribution AND Post-Graduate Supervision OR industrial IC Design Team Lead.
  • Evidence of successful ownership and execution of high performance or innovative analog, digital, mixed-signal, PMIC or RF CMOS circuit designs from architecture through to tape-out.
  • Evidence of strong team oriented management skills through stewarding a CMOS design or research team to develop innovative “break-through” IC circuits.
  • Record of guiding collaborations across organisations, functions and research or development teams.
  • Broad based knowledge of switch-mode power converter topologies, energy harvesters, storage devices and magnetic devices.
  • Evidence of capability in research proposal writing and research funding acquisition.
  • The successful candidate will have very good interpersonal, communications and organizational skills.
  • The successful candidate will have a significant tier-one publishing or patenting record.
  • You will be ambitious to attain high profile through publishing and presenting at tier-one silicon conferences.

Desirable Criteria

  • Experience in supervision of post-graduate students studying at Masters/ PhD level.
  • Strong knowledge of digital control loop design.
  • Experience of multi-domain mixed signal systems level modelling in MATLAB-SIMULINK.
  • Experience of the patenting process, IP management or technology transfer.

To have a chat or make an informal enquiry, in confidence, please feel free to contact

The appointment may be made on the Admin II Grade 6A Salary Scale, €64,760 to €82,032 p.a. Salary placement on appointment will be in accordance with the public sector pay policy.

Further information can be found here

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