| Peter Ossieur | PAM-4 CDR | Components for analog phase locked loop | STM 65nm CMOS, Phase detector, charge pump, analog filter, high-speed digital divider circuit with few programmable divider settings | Silicon Proven | UCC |
| Anding Zhu | ADC | Algorithm | Volterra-based RLS (Recursive Least-Square) algorithms for Digital Post-Correction of ADCs | | UCD |
| Anding Zhu | ADC | Algorithm | Algorithms for Non-uniform Analog Interpolated Multichannel Digital Post-Correction for Time-Interleaved ADCs | | UCD |
| John Doyle | AMS | Current Sense | 0.35um CMOS High-side Current Sensor | Silicon Proven | UCC |
| Kevin McCarthy | Power Management | DCDC | 30MHz DC-DC Converter with Integrated Magnetics | Silicon Proven | UCC |
| Tony Scanlan | ADC | ADC | 65nm HiCOSANT SAR ADC with Novel Calibration | Silicon Proven | UL |
| Peter Kennedy | PLL | Freq Div | Divide-by-three Injection-Locked Frequency Divider | | UCC |
| Ivan O'Connell | RF | Voltage Controlled Oscillator | High-performance Voltage Controlled Oscillators in a SiGe BiCMOS technology | Silicon Proven | UCC |
| Ivan O'Connell | RF | Varactor | High Q Varactor for High-performance Voltage Controlled Oscillators in a SiGe BiCMOS technology | Silicon Proven | UCC |
| Ivan O'Connell | ADC | Thermal noise reduction | Reduction of Sampled KT/C Thermal Noise for ADC | Simulation | UCC |
| Ivan O'Connell | AMS | TIA | 3.3V 0.35um transimpedance amplifier | Layout | UCC |
| Ivan O'Connell | AMS | Active Quench Circuit | Active quench circuit for use with Single Photon Avalance Diode | Layout | UCC |
| Ivan O'Connell | AMS | Bandgap | 3.3V supply 0.35um 1.2V Bandgap Reference circuit | Layout | UCC |
| Ivan O'Connell | Digital | Ring Oscillator | 0.35um 666MHz ring oscillator with divide-by-32 | Layout | UCC |
| Ivan O'Connell | AMS | SPAD readout | 0.35um single photon avalance diode pixel read out circuit | Layout | UCC |
| Ivan O'Connell | AMS | TDC | 0.35um time-to-digital converter | Layout | UCC |
| Ivan O'Connell | Digital | Standard-cells | 0.35um digital standard cells | Layout | UCC |
| Ivan O'Connell | Biomedical | Pace controller circuit | 0.35um CMOS low power Cardiac Pace Controller which interfaces with sense channels & microprocessor to handle multi-mode pacing | Silicon Proven | UCC |
| Ivan O'Connell | Biomedical | Chip | 0.35um CMOS low power chip that includes Atrium Sense, Ventricle Sense, Thorasic Impedance Sense, Atrium Pace, Ventricle Pace, Neurostimulation, Hysteric Boost Block and Real time Clock to enable Rate Responsive heart pacing | Silicon Proven | UCC |
| Ivan O'Connell | Biomedical | Chip | 0.35um CMOS low power chip that includes Atrium Sense, Ventricle Sense, Atrium Pace, Ventricle Pace, Neurostimulation, Hysteric Boost, Real time Clock and Pace Controller to enable heart sensing and pacing without the intervention of a micro controller | Silicon Proven | UCC |
| Ivan O'Connell | ADC | Capacitive-to-Digital converter | 0.35um CMOS Oversampled Sigma Delta ADC with extended Input Range | Silicon Proven | UCC |
| Ivan O'Connell | Digital | Asynchronous I 2 C Slave Interface | Asynchronous I 2 C Slave Interface | Silicon Proven | UCC |
| Ivan O'Connell | Sensor | Layout | Several permutations of Interdigitated Sensor Structure Test Chip | Silicon Proven | UCC |
| Ivan O'Connell | ADC | Sigma Delta Modulator | Sigma Delta Modulator on XFAB 0.35um | Layout | UCC |
| Ivan O'Connell | Biomedical | DNA Sensor Chip | 0.35um CMOS DNA Sensor Chip containing a high-resolution sigma-delta Capacitive-to-Digital converter, I 2 C Interface, bandgap reference, bias generator, 1MHz oscillator, Power-on-Reset circuits, EEPROM memory for ID coding, chip tracking, and sensor calibration coefficients.
| Silicon Proven | UCC |
| Ivan O'Connell | ADC | SAR ADC Chip | 28nm 13 ENOB noise-shaped SAR ADC | Silicon Proven | UCC |
| Ivan O'Connell | ADC | SAR ADC Chip | 28nm 15 bit, 1MS/s, 1st Order Noise Shaped SAR ADC | Silicon Proven | UCC |
| Mark Smyth | Clocking | ADPLL | 28nm 16GHz Low Power All-Digital Phase Locked Loop (DPLL) | Silicon Proven | UCC |
| Ivan O'Connell | ADC | SAR ADC Chip | 65nm Low Power 1MS/s 12-bit SAR ADC, 76db SFDR, 62db SNR | Silicon Proven | UCC |
| Ivan O'Connell | ADC | SAR ADC Chip | 130nm 2-MS/s 12-bit Extended Input Range SAR ADC with Improved DNL & Offset Calculation | Silicon Proven | UCC |
| Ivan O'Connell | ADC | High-speed ADC | 28nm 1GS/s 8-Bit ADC | Layout | UCC |
| Bogdan Staszewski | RF | RF-DAC | 28nm iDTX - an Interpolative Digital Transmitter with Quantization Noise and Replicas Rejection | Silicon Proven | UCD |
